The present invention relates to a code division multiple access (hereinafter referred to simply as a xe2x80x9cCDMAxe2x80x9d) system employing a spread spectrum (SS) communication scheme in the field of mobile communication.
Since spread spectrum communication employed in the field of mobile communication permits code division multiple access and has superior noise resistance, the spread spectrum communication is used for a CDMA communications system or radio LAN communications. A CMDA communications system is currently in actual use in North America and Korea (hereinafter referred to as a xe2x80x9cNorth American Schemexe2x80x9d) and is standardized as (TIA/EIA/IS95 and TIA/EIA/IS98) scheduled to be put into service by Japanese communication service companies. Further, another CDMA scheme is scheduled to be adopted in Japan as a third-generation mobile communications scheme (hereinafter referred to simply as a xe2x80x9cwideband schemexe2x80x9d).
A spread spectrum scheme comprises a spread spectrum direct sequence (direct spread spectrum) scheme and a spread spectrum frequency hopping scheme. All currently employed as CDMA schemes are direct sequence schemes. In a spread spectrum communications scheme, multipath components are combined at the maximum rate through use of a receiver called a RAKE system, thereby producing a diversity effect. The RAKE receiver is described in, e.g., U.S. Pat. No. 5,109,390.
Use of the RAKE receiver complying with the CDMA scheme enables a mobile communications device to communicate with base station other than the base station with which the device is currently communicating, thus allowing a hand-off without interruption of communication (i.e., a soft hand-off).
In order to realize a soft hand-off, the North American scheme causes all the base stations to be in synchronization with one another through use of the Global Positioning System (GPS). In the wideband scheme, the base stations are not in synchronization with one another. Accordingly, the North American scheme enables easier detection of a base station for soft hand-off purpose. In the North American scheme, all base stations share a common code (e.g., a long code), and the base stations are brought into synchronization with one another by activating a generator for producing the common code through use of a GPS clock signal.
FIG. 6 shows the configuration of a mobile communications device complying with the North American scheme. The mobile communications device shown in FIG. 6 is roughly divided into a transmission section A and a receiving section B. The transmission section A comprises a transmission data preparation section 1; an error detection/correction encoding section 2; a long code generator 3; a long code modulation section 4 which performs a first spreading operation through use of the long code; an in-phase component direct sequence section 5 which directly spreads a long code modulation signal through use of a spread code of an in-phase component; a quadrature component direct sequence section 6 which directly spreads a long code modulation signal through use of a spread code of a quadrature component; and a radio transmission section 7 which converts the frequency of a directly-spread base band signal into a radio frequency band, amplifies the signal, and transmits the signal from an antenna.
The receiving section B comprises a radio receiving section 8 which receives a signal of radio frequency band by way of an antenna, amplifies the signal, and converts the frequency of the received signal into a base band range; a RAKE receiving section 9 which combines multipath components at the maximum rate and effects a soft hand-off; a symbol combining section 10 which combines a received symbol at the maximum rate; the long code generator 3 that is identical in configuration with that provided in the transmission section A; a decimating section 11 which decimates the long code; a long code demodulation section 13 which descrambles the long code through use of the decimated long code; an error detection/correction decoding section 14; and a demodulation data processing section 15 which segments the decoded received data into an audio signal and a control signal. The RAKE receiving section 9 comprises in-phase component despread sections 9a to 9c; quadrature component despread sections 9d to 9f; and combining sections 9g to 9i. In-phase components and quadrature components are despread and combined for every path, whereby a despread signal (i.e., a received symbol) is output for every path.
In the existing mobile communications device complying with the North American scheme, the mobile communications device produces at different timings, a long code for transmission purpose and a long code for receiving purpose. Therefore, as shown in FIG. 6, the communications device requires separate long code generators for transmission and receiving purposes. The reason for this will now be described. FIG. 7 shows the configuration of a long code generator used in the existing North American scheme mobile communications device. As shown in FIG. 7, the long code generator comprises 42 flip-flops, XOR circuits provided for all the outputs of the flip-flops, and seven XOR circuits necessary for feed-back operations (dividing operations) of a shift register (42 AND circuits are also required if a long code masking operation is performed). A clock frequency of 1.228 MHz is used as a clock signal for the long code generator.
In a North American scheme mobile communications device, an output from the long code generator 3 of the transmission section is used as a long code for the receiving section while being decimated. In the mobile communications device, a transmission timing is matched with the fastest path by means of the antenna""s edge according to the North American standards. The transmission timing is usually faster than the receiving timing because of a delay in the radio section and a delay for multipath combining (or a difference in timing between the fastest path and the slowest path), thereby posing no problem. However, the transmission timing is sometimes delayed (see EIA/TIA/IS-95A), and hence the receiving timing may become faster than the transmission timing, thereby posing a problem. The mobile communication device receives from the base station a string of long codes having a certain absolute time interval. From that point on, the mobile communications device produces a long code through use of a clock signal in synchronization with the base station. Accordingly, the mobile communication device cannot hold a string of long codes prior to receipt of a string of long codes from the base station. Accordingly, if the receiving timing becomes faster than the transmission timing, the receiving section cannot receive the long code from the transmission section. The despread timing of the RAKE receiving section of the receiver changes every time a receiving path changes, thereby making it difficult to adjust the transmission and receiving timings.
For this reason, the receiver is required to have a long code generator which operates at a timing independent of the transmission section and is identical with the long code generator of the transmission section (see the configuration of the long code generator shown in FIG. 6). For this reason, the mobile communications device becomes larger in scale, and an electric current dissipated in the communications device is increased.
Under the North American standards, the symbol combining section 10 is required to combine a delay path spreading over a cycle of several symbols without involvement of phase shift. Paths used for combining symbols are frequently switched in order to improve a receiving performance. If the receiving timing of each path frequently changes over a cycle of several symbols, the delay path cannot be combined without involvement of phase shift. For this reason, the configuration of the symbol combining section 10 becomes complicated.
The present invention is aimed at solving the foregoing problem of the existing CDMA mobile communications device, and the object of the present invention is to provide a superior CDMA mobile communications device which can be made compact and can reduce an electric current to be dissipated by means of a reduction in the number of receiving long code generators caused by storing long codesxe2x80x94which are previously produced by a transmission section in at least a number corresponding to the maximum timing differencexe2x80x94into a buffer before a receiving timing becomes faster than a transmission timing, and by reading the long code as a received long code.
Another object of the present invention is to provide a superior CDMA mobile communications device which can combine a delay path spreading over a cycle of several symbols with a simple configuration and without involvement of phase shift, by calculation of write and read addresses of a first-in-first-out (FIFO) buffer which stores a despread output symbol of each path, and through use of a reference clock generator, a counter which is incremented every time each path produces a despread output, and a differential signal generator for producing a difference between a previous count value and a current count value.
To solve the foregoing problem, a CDMA mobile communications device according to the present invention comprises: a buffer which decimates an output from a long code generator to be used in a transmission section and stores the thus-decimated long code; a buffer control section which controls addresses for writing and reading the buffer; and a long code demodulator which processes the long code (received long code) output from the buffer and a received signal (received symbol) output from a RAKE receiving section by means of a XOR operation.
A CDMA mobile communications device according to the present invention comprises: a RAKE receiving section which separates a received signal for each transmission path, despreads the thus-separated signal components for each in-phase and for each quadrature component through a spread string and merges the components into a combination signal, and outputs the combination signal for each path; first-in-first-out (FIFO) buffers which store outputs (received symbol) from the RAKE receiving section for individual paths; a counter which is incremented at every output timing (or dump clock) for each path of the RAKE receiving section and whose maximum value is equivalent to the maximum number of received symbols to be stored in the FIFO buffer; a reference clock signal generator for outputting a clock (or reference clock) signal which runs at the cycle of the received symbol; a FIFO buffer control section which stores the received symbol into each of the FIFO buffers for every reference clock signal by referring to an output from the counter provided for each path as a write relative address and reads the read relative addresses of all the FIFO buffers from an identical count value; and a symbol combining section which merges the outputs from the FIFO buffers into one symbol.
With the foregoing configuration, before the receiving timing become faster than the transmission timing, the long code previously received by the transmission section is stored in the buffer in a number corresponding to the maximum timing difference. The thus-stored long code is read as a received long code from the buffer, thereby eliminating a received long code generator. As a result, there is obtained a superior CDMA mobile communications device which can be made compact and can reduce an electric current to be dissipated.
Further, there are provided a plurality of FIFO buffers for storing despread output symbols for individual paths. A write address of the FIFO buffer is calculated through use of a reference clock signal generator, and a read address of the FIFO buffer is calculated through use of a reference clock signal generator, a counter which is incremented for an output from each path, and a differential signal generator which produces a difference between the previous count value and the current count value. As a result, there is obtained a superior CDMA mobile communications device which can combine a delay path without involvement of phase shift and with a simple configuration.
Specifically, according to the first aspect of the present invention, a CDMA mobile communications device comprises: a transmission section including a transmission data preparation section, an encoding section for detecting and correcting an error, a long cycle string code (long code) generator used for primary spreading operations, a long code modulator which processes the long code and an output from the encoding section by means of an exclusive OR operation; a short code spreader which divides an output from the long code modulator into in-phase components and quadrature components and processes the components by means of secondary spread through use of a short cycle string code (short code), a frequency conversion section which converts the frequency of an output from the short code spreader into a radio frequency range, an amplifier for amplifying the thus-frequency-converted signal, and an antenna; and a receiving section including a radio receiving section for converting a signal received by an antenna into a signal of base band range, a RAKE receiving section which separates an output from the radio receiving section for each transmission path and despreads the thus-separated outputs for each in-phase component and for each quadrature component by means of despreading operations through use of the short code, a symbol combining section which combines outputs from the RAKE receiving section, a buffer which decimates the output from the long code generator of the transmission section and stores the thus-removed long codes, a buffer control section which controls read and write addresses of the buffer, a long code demodulator which processes the long code (received long code) output from the buffer and the received signal (received symbol) output from the symbol combining section by means of exclusive OR operations, a reference clock signal generator for producing a clock signal which runs at the cycle of the received symbol, an error detection-and-correction section which reproduces received data by detection and correction of an error in the symbol output from the long code demodulator, and a demodulated data processing section which decomposes the reproduced data into a sound signal and a control signal. The CDMA mobile communications device enables data transmission of audio and control data according to a CDMA scheme without use of a received long code generator and can be made compact.
Further, according to second aspect of the present invention, the buffer previously stores the received long code in at least a number corresponding to the maximum amount of delay before a transmission timing of the transmission section lags. The device can supply a received long code even when the transmission timing becomes lagged.
Further, according to the third aspect of the present inveniton, a CDMA mobile communications device comprises: a long cycle string code (long code) generator to be used in primary spreading operations for transmission; a decimating section for decimating an output from the long code generator; a first-in-first-out (FIFO) buffer for storing an output (received long code) from the decimating section; a reference clock signal generator for producing a clock (reference clock) signal which runs at the cycle of a despread received signal (received symbol); a first counter which is incremented at the output timing (or dump clock timing) of the decimating section; a second counter which is incremented at the reference clock cycle; and a long code operation section which processes the output from the FIFO buffer and the despread received signal. The CDMA mobile communications device enables data transmission of audio and control data according to a CDMA scheme without use of a received long code generator and can be made compact.
According to fourth aspect of the present invention, modulo values of the first and second counters are taken as the maximum number of long codes which the FIFO buffer can store, and wherein the output from the first counter is referred to as a write address of the FIFO buffer every output timing (dump clock timing), and the output from the second counter is referred to as a read address of the FIFO buffer every reference clock signal. The device enables transmission according to a CDMA scheme without use of a received long code generator and with a simple configuration and can be made compact.
According to fifth aspect of the present invention, a CDMA mobile communications device comprises: a long cycle string code (long code) generator to be used in primary spreading operations for transmission; a reference clock signal generator for producing a clock (reference clock) signal which runs at the cycle of a despread received signal (received symbol); a decimating section for decimating an output from the long code generator; a shift register which stores the long code (received long code) while shifting the long code each timing (dump clock timing) at which the decimating section produces an output; a counter which is incremented at every dump clock timing and is reset at the reference clock cycle; an integrator which integrates the count value, outputs an integral value, and is decremented after outputting of the integral value; and a long code operation section which reads the received long code of the shift register from the position corresponding to the value output from the integrator and processes the received long code and a despread received signal by means of exclusive OR operations. The CDMA mobile communications device enables data transmission of audio and control data according to a CDMA scheme without use of a received long code generator and can be made compact.
According to the sixth aspect of the present invention, a CDMA mobile communications device comprises: a radio receiving section for converting a signal received by an antenna into a signal of base band range; a RAKE receiving section which separates an output from the radio receiving section for each transmission path and despreads the thus-separated outputs for each in-phase component and for each quadrature component by means of despreading operations through use of the short code; a plurality of buffers which store outputs from the RAKE receiving section for respective paths; a symbol combining section which combines outputs from the buffers; a buffer control section which calculates write and addresses of each buffer on the basis of information about the timing of the signal for each path received from the RAKE receiving section in order to prevent phase shift among the outputs from the buffers at the time of combining of a symbol; a long cycle string code (long code) generator; a decimateing section which decimates an output from the long code generator; a long code demodulator which processes an output (received long code) from the decimating section and an output (received symbol) output from the symbol combining section by means of exclusive OR operations; an error detection-and-correction section which reproduces received data by detection and correction of an error in the symbol output from the long code demodulator; and a demodulated data processing section which decomposes the reproduced data into a sound signal and a control signal. The device can combine RAKE received output signals of each path without phase shift.
Furthermore, according to the seventh aspect of the present invention, the plurality of buffers comprise a plurality of first-in-first-out (FIFO) buffers which store outputs (received symbols) from the RAKE receiving section for each of the paths; and wherein the buffer control section comprises a plurality of first counters which are incremented at every output timing (dump clock timing) for each of the paths of the RAKE receiving section and whose maximum value is equivalent to the maximum number of received symbols to be stored in each FIFO buffer; a reference clock signal generator for producing a clock (reference clock) signal running at the cycle of the received symbol; a second counter which is referred to as a relative address of each FIFO buffer and whose maximum value is equal to the maximum number of symbols to be stored in each FIFO buffer; and a FIFO buffer control section which stores received symbols into the individual FIFO buffers while, for every reference clock signal, referring to outputs from the plurality of first counters as write addresses and which refers to all the relative read addresses of the FIFO buffers as an identical count value of the second counter. There can be simplified the configuration for symbol combining operations in which the RAKE receiver output signal for each path is combined without involvement of phase shift.
According to the eighth aspect of the present invention, the FIFO buffer control section comprises: a switch for selecting a count value (the fastest count value) corresponding to the fastest path (a receiving path over which a signal arrives at the fastest speed); a delay device which delays the fastest count value for one cycle of the reference clock signal; a differential signal generator which produces a signal relating to a difference between the output from the switch and the output from the delay device; a FIFO buffer output symbol number calculation section which calculates from the output from the differential signal generator the number of symbols output from each FIFO buffer; and a FIFO buffer read address calculation section for incrementing the count value of the second counter referred to at the time of calculation of the read address, after each FIFO buffer has been read. There can be simplified the configuration for symbol combining operations in which the RAKE receiver output signal for each path is combined without involvement of phase shift.
The above mentioned inventions can be applied to a CDMA mobile communications base station or a CDMA receiving method. Therefore, the devices operate in the same way as those mentioned above.